The present specification generally relates to integrated circuits. More particularly, the present specification describes a buffer/driver system.
Technology advances in integrated circuit fabrication have led to more compact chip designs. Lower voltage processes come with the smaller size. CMOS devices can use low voltage power supplies to prevent damage to devices having small feature sizes, and to reduce the overall power consumption. For example, power supplies for CMOS devices are being reduced from 3.3 volts to 2.5 volts and lower. However, low voltage CMOS devices often interface with transistor--transistor logic (TTL) devices that operate at higher supply voltages, e.g., 5 volts.
The Peripheral Component Interconnect (PCI) bus standard, PCI Compliance Checklist, Revision 2.1, published Jan. 1, 1997, requires a minimum of 2.4 volts on the bus to identify a high transition. Typically, there are a large number of buffers and drivers tied to the bus, any of which can be a TTL device. Therefore, each device must be capable of driving at least 2.4 volts, and be able to withstand voltage levels as high as 6.5 volts.
Another issue with multiple supply voltages is that the different voltages have different characteristics. Some voltages may be stable before others. In a worst case scenario, the highest voltage, e.g., 5 volts, may stabilize first, and already be at its highest level while the other voltages, e.g., 3.3 volts and 1.8 volts, are still at ground or low level. Such an initial condition at power-up could expose low voltage CMOS devices to the full 5 volts. This can cause damage to the device or a shortened life. For example, this could damage the gate oxide in the transistors that form the devices. This situation can be exacerbated by the PCI specification, which requires some of the PIN's to power up at 5 volts.